49 #define DEBUG(str) __esos_unsafe_PutString(str)
52 struct stTask __stChildTaskI2C, __stGrandChildTaskI2C;
53 uint8_t __esos_i2c_dataBytes[2];
55 static char ac_debug[80];
80 rcc_periph_clock_enable(RCC_I2C1);
88 RCC_CCIPR |= 0x00002000;
92 gpio_mode_setup(GPIOB, GPIO_MODE_AF, GPIO_PUPD_PULLUP, GPIO8);
93 gpio_set_output_options(GPIOB, GPIO_OTYPE_OD, GPIO_OSPEED_100MHZ, GPIO8);
94 gpio_mode_setup(GPIOB, GPIO_MODE_AF, GPIO_PUPD_PULLUP, GPIO9);
95 gpio_set_output_options(GPIOB, GPIO_OTYPE_OD, GPIO_OSPEED_100MHZ, GPIO9);
96 gpio_set_af(GPIOB, GPIO_AF4, GPIO8);
97 gpio_set_af(GPIOB, GPIO_AF4, GPIO9);
98 i2c_peripheral_disable(I2C1);
100 i2c_enable_analog_filter(I2C1);
101 i2c_set_digital_filter(I2C1, 0);
103 i2c_set_speed(I2C1, u32_i2cbps, 8);
105 i2c_enable_stretching(I2C1);
107 i2c_set_7bit_addr_mode(I2C1);
108 i2c_set_own_7bit_slave_address(I2C1, 0);
112 i2c_peripheral_enable(I2C1);
138 ESOS_CHILD_TASK( __esos_i2c_hw_writeN, uint8_t u8_addr, uint8_t* pu8_d, uint8_t u8_cnt) {
139 static uint8_t u8_tempAddr;
140 static uint8_t* pu8_tempPtr;
141 static uint8_t u8_tempCnt;
149 CLEAR_REGISTER_BITS(I2C1_CR2, I2C_CR2_SADD_7BIT_MASK | I2C_CR2_NBYTES_MASK | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | I2C_CR2_START | I2C_CR2_STOP );
159 __ESOS_I2C_STM32L4_SET_ADDR7_MODE();
160 __ESOS_I2C_STM32L4_SET_ADDR7(MAKE_I2C_WR_ADDR(u8_tempAddr));
161 __ESOS_I2C_STM32L4_SET_WRITE_DIR();
162 __ESOS_I2C_STM32L4_SET_NUM_BYTES(u8_cnt);
163 __ESOS_I2C_STM32L4_SET_AUTOEND();
168 I2C1_CR2 |= I2C_CR2_START;
172 while (u8_tempCnt--) {
188 I2C1_TXDR = *pu8_tempPtr;
200 __ESOS_I2C_STM32L4_CLEAR_STOP_FLAG();
202 __ESOS_I2C_STM32L4_RESET_CR2();
217 ESOS_CHILD_TASK( __esos_i2c_hw_readN, uint8_t u8_addr, uint8_t* pu8_d, uint8_t u8_cnt) {
218 static uint8_t u8_tempAddr;
219 static uint8_t* pu8_tempD;
220 static uint8_t u8_tempCnt, u8_i;
224 u8_tempAddr = u8_addr;
229 __ESOS_I2C_STM32L4_SET_ADDR7(u8_tempAddr);
230 __ESOS_I2C_STM32L4_SET_READ_DIR();
231 __ESOS_I2C_STM32L4_SET_NUM_BYTES(u8_cnt);
233 I2C1_CR2 |= I2C_CR2_START;
235 __ESOS_I2C_STM32L4_SET_AUTOEND();
236 for (u8_i=0; u8_i < u8_tempCnt; u8_i++) {
250 *pu8_tempD = I2C1_RXDR;
260 __ESOS_I2C_STM32L4_CLEAR_STOP_FLAG();
262 __ESOS_I2C_STM32L4_RESET_CR2();
297 ESOS_CHILD_TASK( __esos_i2c_hw_writeNReadM, uint8_t u8_addr, uint8_t* pu8_wd, uint8_t u8_wcnt, uint8_t* pu8_rd, uint8_t u8_rcnt) {
298 static uint8_t u8_tempAddr;
299 static uint8_t* pu8_tempWPtr;
300 static uint8_t u8_tempWCnt;
301 static uint8_t* pu8_tempRPtr;
302 static uint8_t u8_tempRCnt;
315 CLEAR_REGISTER_BITS(I2C1_CR2, I2C_CR2_SADD_7BIT_MASK | I2C_CR2_NBYTES_MASK | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | I2C_CR2_START | I2C_CR2_STOP );
317 __ESOS_I2C_STM32L4_SET_ADDR7_MODE();
318 __ESOS_I2C_STM32L4_SET_ADDR7(MAKE_I2C_WR_ADDR(u8_tempAddr));
319 __ESOS_I2C_STM32L4_SET_WRITE_DIR();
320 __ESOS_I2C_STM32L4_SET_NUM_BYTES(u8_wcnt);
321 __ESOS_I2C_STM32L4_SET_AUTOEND();
323 I2C1_CR2 |= I2C_CR2_START;
325 while (u8_tempWCnt--) {
327 I2C1_TXDR = *pu8_tempWPtr;
335 __ESOS_I2C_STM32L4_CLEAR_STOP_FLAG();
337 __ESOS_I2C_STM32L4_RESET_CR2();